star sensors is one of the important components of autonomous navigation attitude control system. As the core component of star sensor, information processing system has important influence on the performance of star sensor. Anationally produced information processing system for multi-field-of-view star sensor based on the architecture of Feiteng multi-core DSP and Fudan micro FPGA is designed in this paper. In the design, EMIF and GPIO interface are used to interact and control data with Fudan micro FPGA. Two serial Flash chips are used to store star database data and start programs, and two DDR3chips are used to cache data. The whole software process design, algorithm process design and implementation of the information processing system are introduced in detail in this paper. After experimental verification, the system can operate stably and output the correct attitude. When the star map resolution is 2048×2048,the system has an update frequency of 20Hz for data without initial pointing, while the update frequency is 625Hz with initial pointing. The computing performance is about 3times that of the ordinary ARM architecture, which is of great significance for improving the real-time performance of the multi-field-of-view star sensor and enriching its engineering implementation method.
Attitude sensors are a very important component of autonomous navigation attitude control systems. Among them, the star sensor using the stellar coordinate system as the reference coordinate system is currently the attitude sensor with the highest measurement accuracy. In addition, star sensors also have high reliability, light weight, and are not affected by orbit. However, due to limitations in working principle and structural design, the roll angle accuracy output by the star sensor is one order of magnitude lower than the pitch angle accuracy and yaw angle accuracy, and may not be able to output attitude data when affected by stray light. To solve this problem, usually multiple star sensors are used for joint operation or multiple field of view star sensors.
Multi field star sensors generally adopt the method of multi detector single information processing system. The information processing system mainly processes star map data from the detector. Firstly, the star point data is identified, followed by attitude calculation. Finally, the calculated attitude information is fused and sent to the main control unit. Compared to the multi star sensor scheme, the multi field of view star sensor has higher three-axis attitude accuracy, stronger stray light suppression ability, and higher dynamic performance.
In recent years, the main development trends of star sensors have mainly focused on high-precision, high dynamic performance, high computing power, miniaturization, etc. Therefore, their information processing systems are also developing towards high integration and performance. Generally speaking, due to device level requirements, aerospace grade FPGA+DSP architecture is generally used in China to complete star sensor information processing systems. Compared to single processor systems, this architecture has stronger computing power and can achieve pipeline processing of star maps, greatly improving data processing speed. Therefore, it is widely used in star sensor information processing systems. Due to the excellent performance of DSP in the field of high-performance computing, its demand is increasing day by day. At present, Texas Instruments in the United States occupies the vast majority of the DSP market. China has a huge DSP market, and with the development of trade wars, relying on foreign devices for a long time will inevitably face hidden dangers such as blockades, embargoes, or information security. Therefore, achieving autonomous control of DSP chips, especially star sensors, which are important components of spacecraft attitude control systems, has become particularly important. Therefore, achieving the comprehensive localization of star sensor information processing systems has important practical significance.
This article designs an information processing system for multi field star sensors based on the architecture of Galaxy Feiteng multi-core DSP and Fudan MicroFPGA. Among them, the Galaxy Feiteng DSP mainly realizes information processing functions, while the Fudan MicroFPGA mainly realizes data transmission and communication interface control functions. This architecture has flexible structure, strong computing power, high reliability, and strong scalability, meeting the requirements of small size, high data update rate, and strong real-time performance.
The hardware part of the information processing system first needs to transmit the star map data output by the detector imaging circuit, preprocess the original data and extract star points to obtain star point data; Then identify the extracted star point data and perform pose calculation; Finally, the data from multiple detectors is fused to obtain high-precision attitude data, which is then transmitted to the main control unit. The Galaxy Feiteng multi-core DSP is the main processor of the multi field of view star sensor designed in this article, mainly responsible for data reading and the operation of star map recognition algorithms, attitude calculation algorithms, and data fusion algorithms; Fudan MicroFPGA is a coprocessor mainly responsible for data transfer. This system separates data processing and data movement, and each processor performs its own duties and cooperates with each other, effectively improving the operational efficiency of the entire system.
The overall hardware structure diagram of the multi field star sensor information processing system is shown in Figure 1. The hardware part of the system mainly consists of clock circuit, power circuit, SPI Flash storage circuit, communication circuit between DSP and FPGA, DDR3 storage circuit, and JTAG upper computer debugging circuit.
DSP and FPGA mainly use EMIF interface and GPIO interface. EMIF is an interface between external memory and other on-chip units, supporting multiple types of external memory (mainly including synchronous RAM and asynchronous memory).
The star map recognition algorithm requires the support of a star library, so the information processing system needs to read the star library data from SPI Flash before the algorithm runs. To simplify circuit design, store the power on self start program in another SPI Flash.
Due to the fact that the parameters of multiple detectors are not exactly the same, some parameters of the relevant star map recognition algorithms are also not completely the same. In order to reduce program runtime, parallel execution is used to calculate the star map data of multiple detectors, which requires a large cache space. Therefore, DDR3 is selected as the storage component for the data cache.
DSP can be configured with multiple devices for bootstrapping, and the boot programs for each core are stored in boot images, which are stored in off chip Flash or host devices. When the chip starts, the DSP loads the boot image to the preset storage location, and then the boot image program is executed by kernel 0.
The star map recognition algorithm mainly involves two tasks: developing a navigation star library and implementing star recognition algorithms. Among numerous recognition algorithms, the triangle algorithm is widely used in engineering practice due to its simple implementation, fast execution speed, and intuitive appearance. However, it also has the drawbacks of redundant and incorrect recognition. This article uses an improved triangle algorithm to streamline the star library and reduce the system’s storage space requirements. By improving the search, recording, and elimination methods of traditional triangle recognition algorithms, the recognition success rate has been improved and the algorithm running time has been reduced.
The star map recognition algorithm is relatively complex and requires real-time performance. For multi detector systems, serial execution programs obviously cannot meet the requirements, so a master-slave multi-core parallel processing method is adopted to improve the system’s work efficiency. Among them, Core 0 serves as the main core, mainly responsible for interacting with peripherals, initializing related work components, controlling slave core work, data transmission and aggregation; The other cores serve as slave cores, mainly responsible for executing star map recognition related programs, calculating attitudes, etc. Each slave core has the same status and does not engage in communication or data exchange. When DSP starts working, the peripheral devices and related working components are first initialized by core 0, and then wait for commands from the upper computer forwarded by FPGA, and drive the information processing system to work according to the commands. In order to make the master core control the slave core work more simply and conveniently, this article adopts a shared address method to achieve inter core communication.
Functional verification tests were conducted under indoor conditions. The main testing equipment includes high-precision programmable power supply, oscilloscope, computer, Fudan micro FPGA downloader, Feiteng DSP downloader, and ground detection circuit board. The data is sent to the upper computer through a serial port for verifying the system’s functionality.
This experiment used upper computer software (see Figure 9) to simulate sending and receiving commands. The upper computer can send different instructions to the information processing system, and can also receive and decode the response frame data of the information processing system to verify its functionality. Use the upper computer software to randomly send three different instructions, with each instruction sent 500 times. Table 2 lists the statistical data of response frames returned for different instructions. It is not difficult to see that the system can fully return response frames for all instruction frames. The returned parameters are correct and correct, verifying the feasibility of system functionality.
After functional verification, perform algorithm testing on the information processing system. A total of 5 different star map data with known postures were selected to validate the system: the first three images were directly imaged by the star sensor; The fourth image is obtained by adding highlight noise to the third star map; The fifth image is obtained from the second image with 2 missing stars; The 4th and 5th images were both generated by Fudan MicroFPGA using Verilog HDL language. In addition, to verify the computational performance of the design, an information processing system based on ZYNQ design was also selected for comparison. Its main control chip is XC7Z010, which integrates dual core ARM Cortex-A9 (with a main frequency of 666MHz).
Table 3 lists the statistical data of the algorithm validation results. It is not difficult to see that the system can operate stably in the presence of bright noise and missing stars. When there is no initial direction, it takes about 50ms for the system to complete a star map recognition, and the data update frequency is about 20Hz; When there is an initial pointing, it takes approximately 1.6ms to complete a star map recognition, and the data update frequency is approximately 625Hz, which can complete the attitude output function. Compared to the ZYNQ architecture, the computational performance advantage brought by multi-core collaborative work is more obvious.
Star sensors play a crucial role in autonomous navigation applications. With the widespread application of multi field star sensors, achieving more powerful computing functions and higher integration has become increasingly important, and the requirements for hardware architecture design have become increasingly high. This article designs an information processing system for multi field star sensors based on the Feiteng DSP+Fudan MicroFPGA architecture. After experimental verification, the system can stably output corresponding response frame data for different commands, and has strong computing power, which can simultaneously process star map data from multiple detectors. When there is no initial pointing, the attitude output frequency can reach up to 20Hz; When there is initial pointing, the attitude output frequency can reach up to 625Hz. Therefore, this system has practical significance for research and development. The next focus of work is to improve the entire system and add image transmission functions, in order to design a star sensor system with higher integration, stronger and more stable functions, and a larger number of detectors.
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TY-Space Technology (Beijing) Ltd. is professional focusing on advanced attitude optical sensors, especially Star Trackers for space industry.
